Digital Logic Design [ DLD] Subject Important questions : II MID



DLD IMPORTANT QUESTIONS 


UNIT-4

1(a).Define Sequential logic circuit. Distinguish between synchronous and asynchronous sequential logic circuits.
  (b)Discuss about SR and D flipflop with neat diagram and truth tables and excitation tables.
2(a). Discuss about JK and T flipflop with neat diagram and truth tables.
   (b)Perform JK to T Flipflop Conversion.
3.What is Race –around-condition in JK flipflop and how it is avoided..Explain JK Master Slave flipflop.
4(a)What is Excitation table.Draw excitation tables for JK and T flipflops.
   (b)Perform SR to T flipflop conversion.
5.Define the terms propogation delay,setup time, hold time.
6.Perform the following conversions
(a)SR to Jk  (b)JK to D

UNIT-5

1(a)Define the terms Register and Counter.Discuss about various Shift Registers.
    (b)Discuss about Johnson Counter.
2(a)Briefly discuss about Ring Counter.
  (b)Discuss about Bi-directional Shift Register.
3(a) a)Explain about Decade Counter.
  (b)Briefly discuss about Buffer register and Controlled Buffer Register
4.Design a synchronous MOD-6 counter using D-flip-flop.
5.Design mod 11 counter using SR flipflop
6.Define the term counter.Distinguish between synchronous and asynchronous  counter
7.Discuss about 3bit Down Counter

UNIT-6

1.Briefly  discuss about PROM..Implement a combinational logic circuit which accepts 3 bit binary information as input and generate its corresponding square as output using proper size PROM.
2.Briefly discuss about PLA.Implement BCD to Excess-3Code converter using PLA.
3.Briefly discuss about  PAL.Implement the following functions using PAL.
 F1=∑m(0,1,7) anf F2=∑m(1,3,5,7)
4.Compare PROM,PLA,PAL.Implement BCD to Gray Code Converter using PROM.
5.Implement the function F1=m(0,1,5,15) F2=m(2,3,6,10) using PLA.





Digital Logic Design [ DLD] Subject Important questions : II MID Digital Logic Design [ DLD] Subject Important questions : II MID Reviewed by Suresh Bojja on 11/18/2015 02:36:00 AM Rating: 5

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