DLD(Digital Logic Design) : UNITS 3,5,6,4 ,Sure Questions comes in Examinations


Sure Questions comes in Examinations

UNIT-3

1.a)Design half adder using universal gates with Boolean function and truth table?
    b)Design full adder using two basic half adders with Boolean function, and truth table
2.a)Design half subtract or using universal gates (NAND & NOR) gates Boolean function and truth table.www.sureshQ.Blogspot.in
   b)Design full subtract or using basic half sub tractors truth table, Boolean function
3.a)Design ripple adder using full adders (4-bit ripple adder) and design ripple subtract or full adders (4-bit ripple subtract or). 
b)Design ripple adder/subtract or using full adders and explain
4.a)What is decoder? Design 3:8 decoder with functional table and what is encoder
Design 8:3 encoders with functional table. 
   b)What is multiplexer? Design 16x1 MUX using 8x1 mux’s and what is de-multiplexer? Design 1X16 DE-MUX using 1X8 De-Mux. 
5.a)Explain about code converter with any example.www.sureshQ.Blogspot.in
   b)Explain about magnitude comparator? Design 2-bit magnitude comparator with truth table 

Unit-4 
1 a) What is latch? Explain differences between combinational and sequential circuits
    b) What is flip-flop? Draw and explain the SR-flipflop,JK-flip-flop,T-flip-flop,D-flip-flop with truth tables   (positive and negative edge triggering).www.sureshQ.Blogspot.in
2) a)Convert the following flip-flop  in one form in to other form
      Convert JK-flip-flop to SR-flip-flop  ii)Convert JK-flip-flop to T-flip-flop
     iii)Convert T-flip-flop to D-flip-flop   iv)Convert RS-flip-flop to D-flip-flop
    b)write the characteristic equation of JK,SR,T,D Flipflops
3)a) Design excitation tables for JK,SR,T,D Flipflops
    b)Draw and explain the gated SR Latch and Gated D latch
4)a)List out the applications of FLIP-FLOP s
    b)Differences between Latch and Flip flops.www.sureshQ.Blogspot.in
5)Reduce the following function by using K-map Method (Unit-2 Question)


UNIT-5

1. a)Design MOD-6 ripple counter using T-Flip-Flop
b)Design MOD-5 synchronous counter using JK Flip-Flop and implement it
c)What are application shift registers. 
2. a)Difference between asynchronous and synchronous sequential circuits
b)Draw and explain 4-bit buffer register and 4-bit control buffer register
3. a)With neat diagram explain the operation of 3-bit universal shift register
b)With neat diagram explain the operation of 4-bit bi-directional shift register
4. a)What is shift register explain the operation of SISO, SIPO, PIPO, PISO
b)Draw and explain operation of 4-bit ring counter with timing diagrams
5. a)Draw and explain operation of 4-bit ripple/asynchronous counter with output waveforms
b)Draw and explain operation of 3-bit asynchronous/ripple down counter
6. a)With neat diagram explain the operation of jhonson counter
b)Switch tail or twisted ring counter with timing diagram.www.sureshQ.Blogspot.in 
c)Draw and explain operation of 4-bit up/down counter with timing diagram

UNIT-6

1. a)Explain about PROM? Comparison between PLA, PAL, PROM
b)Implement following function using PAL.www.sureshQ.Blogspot.in 
X(A,B,C,D)=∑m(0,2,6,7,8,9,12,13)
y(A,B,C,D)=∑m(0,2,6,7,8,9,12,13,14)
z(A,B,C,D)=∑m(1,3,4,6,9,12,14)
2. a)using PROM relize the following expressions
F1(a,b,c)=∑m(0,1,3,5,7). 
F2(abc)= ∑m(1,2,5,6)
b)Explain about PLA and PAL with any example
3. a)Implement following using PLA
F1(a,b,c)=∑m(0,1,3,4).www.sureshQ.Blogspot.in
F2(abc)= ∑m(1,2,3,4,5).
b)Write a brief note on architecture of PLD.

Prepared by Mr.M.Venkat Rao,Asst.Professor,ECE Department


DLD(Digital Logic Design) : UNITS 3,5,6,4 ,Sure Questions comes in Examinations DLD(Digital Logic Design) : UNITS 3,5,6,4 ,Sure Questions comes in Examinations Reviewed by Suresh Bojja on 9/28/2016 12:43:00 AM Rating: 5

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